| CPC G06F 3/0652 (2013.01) [G06F 3/0619 (2013.01); G06F 3/0647 (2013.01); G06F 3/0683 (2013.01)] | 19 Claims |

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1. A data storage device comprising:
a memory comprising a plurality of memory dies; and
a processor configured to communicate with the memory and further configured to:
receive, from a host, identification of different versions of data that are to be erased together,
store the different versions of the data in a metablock comprising wordlines from different memory dies of the plurality of memory dies, wherein the metablock is defined as a parallel erase unit of the memory such that all of the wordlines from the different memory dies of the plurality of memory dies are erasable together in parallel;
receive, from the host, a command to erase the different versions of the data;
erase the different versions of the data, wherein because the different versions of the data are stored in the parallel erase unit of the memory, the different versions of the data are erased in parallel;
receive, from the host, a request that versions of data be moved to an area of the memory designed for cold data, wherein one of the versions of the data is hot data; and
in response to the request, move the versions of the data to the area of the memory designed for cold data even though one of the versions of the data is hot data.
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