US 12,242,721 B2
Methods and apparatus to profile page tables for memory management
Aravinda Prasad, Bangalore (IN); Sandeep Kumar, Delhi (IN); Sreenivas Subramoney, Bangalore (IN); and Andy Rudoff, Boulder, CO (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Mar. 26, 2021, as Appl. No. 17/214,534.
Prior Publication US 2021/0232312 A1, Jul. 29, 2021
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0604 (2013.01) [G06F 3/0644 (2013.01); G06F 3/0679 (2013.01)] 25 Claims
OG exemplary drawing
 
1. An apparatus to profile page table, the apparatus comprising:
interface circuitry to obtain a page table of data pages, the page table including a first data page at a first level and second data pages at a second level, the second level being lower than the first level, the first data page including the second data pages;
machine readable instructions; and
at least one processor circuit to be programmed by the machine readable instructions to at least:
profile the first data page at the first level of the page table as not part of a target group based on the first data page not being accessed within a threshold amount of time; and
label the second data pages as not part of the target group based on the first data page not being part of the target group.