US 12,242,408 B2
Reconfigurable channel interfaces for memory devices
Michael Dieter Richter, Ottobrunn (DE)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Apr. 12, 2022, as Appl. No. 17/719,316.
Application 17/719,316 is a continuation of application No. 16/858,286, filed on Apr. 24, 2020, granted, now 11,308,017.
Claims priority of provisional application 62/855,305, filed on May 31, 2019.
Prior Publication US 2022/0237139 A1, Jul. 28, 2022
Int. Cl. G06F 13/16 (2006.01); G06F 13/40 (2006.01)
CPC G06F 13/4027 (2013.01) [G06F 13/1668 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
deactivating a first command/address (CA) interface associated with a first memory array of a plurality of memory arrays;
coupling a second CA interface with the first memory array based at least in part on deactivating the first CA interface;
receiving, at the second CA interface over a control channel, a write command for the first memory array and a second memory array of the plurality of memory arrays coupled with the second CA interface, each memory array of the plurality of memory arrays coupled with a respective data channel of a plurality of data channels;
forwarding, by the second CA interface based at least in part on coupling the second CA interface with the first memory array, the write command to the first memory array and the second memory array;
receiving, over a first data channel of the plurality of data channels that is coupled with the first memory array, a first set of data based at least in part on the write command;
receiving, over a second data channel of the plurality of data channels that is coupled with the second memory array, a second set of data based at least in part on the write command; and
writing the first set of data to the first memory array and the second set of data to the second memory array based at least in part on receiving the first set of data and the second set of data.