US 12,242,392 B2
Methods and apparatus to estimate consumed memory bandwidth
Patrick Kruse, Richmond, TX (US); Gregory Shurtz, Houston, TX (US); Denis Beaudoin, Rowlett, TX (US); Abhishek Shankar, Sugar Land, TX (US); and Daniel Wu, Plano, TX (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Aug. 22, 2022, as Appl. No. 17/892,693.
Claims priority of provisional application 63/350,456, filed on Jun. 9, 2022.
Prior Publication US 2023/0401164 A1, Dec. 14, 2023
Int. Cl. G06F 13/16 (2006.01); G06F 12/14 (2006.01)
CPC G06F 12/1416 (2013.01) [G06F 13/1668 (2013.01); G06F 2212/1052 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
bandwidth estimator circuitry configured to:
obtain a first memory transaction including a transacted amount of data; and
determine a consumed bandwidth associated with the first memory transaction based on the transacted amount of data of the first memory transaction; and
gate circuitry configured to:
permit transmission of the first memory transaction to a memory controller circuitry;
determine whether to gate a second memory transaction generated by a source of the first memory transaction based on the consumed bandwidth of the first memory transaction; and
based on a determination to gate the second memory transaction, prevent transmission of the second memory transaction for an amount of time based on the consumed bandwidth.