US 12,242,290 B2
Integrating voltage regulators and passive circuit elements with top side power planes in stacked die architectures
Beomseok Choi, Chandler, AZ (US); William J. Lambert, Tempe, AZ (US); Krishna Bharath, Phoenix, AZ (US); Kaladhar Radhakrishnan, Chandler, AZ (US); Adel Elsherbini, Chandler, AZ (US); Henning Braunisch, Phoenix, AZ (US); Stephen Morein, San Jose, CA (US); Aleksandar Aleksov, Chandler, AZ (US); and Feras Eid, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 24, 2021, as Appl. No. 17/484,286.
Prior Publication US 2023/0095063 A1, Mar. 30, 2023
Int. Cl. G05F 1/44 (2006.01); H01L 23/50 (2006.01); H01L 25/065 (2023.01)
CPC G05F 1/44 (2013.01) [H01L 23/50 (2013.01); H01L 25/0657 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A stacked die apparatus comprising:
a first die comprising voltage regulator circuitry;
a second die comprising logic circuitry;
an inductor;
a capacitor; and
a conformal power delivery structure, the conformal power delivery structure comprising:
a first electrically conductive layer comprising metal, the first electrically conductive layer defining one or more recesses;
a second electrically conductive layer comprising metal, the second electrically conductive layer at least partially within the recesses of the first electrically conductive layer and having a lower surface that generally conforms with the upper surface of the first electrically conductive layer; and
a dielectric material between the surfaces of the first electrically conductive layer and the second electrically conductive layer that conform with one another;
wherein the voltage regulator circuitry of the first die is connected to the logic circuitry of the second die through the inductor, the capacitor, and the conformal power delivery structure.