US 12,240,231 B2
Integrated circuit with address drivers for fluidic die
Scott A. Linn, Corvallis, OR (US); James Michael Gardner, Corvallis, OR (US); and Michael W. Cumbie, Corvallis, OR (US)
Assigned to Hewlett-Packard Development Company, L.P., Spring, TX (US)
Filed by HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P., Spring, TX (US)
Filed on Nov. 17, 2022, as Appl. No. 17/989,354.
Application 17/989,354 is a continuation of application No. 16/768,023, granted, now 11,559,985, previously published as PCT/US2019/016818, filed on Feb. 6, 2019.
Prior Publication US 2023/0081336 A1, Mar. 16, 2023
Int. Cl. B41J 2/045 (2006.01)
CPC B41J 2/04541 (2013.01) [B41J 2/04586 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A fluidic die comprising:
an array of fluid actuating devices addressable by a set of addresses;
an array of memory elements including a first portion to receive a first set of address bits representative of a first portion of an address of the set of addresses, and a second portion to receive a second set of address bits representative of a second portion of the address of the set of addresses;
a first address driver to provide a first portion of the address of the set of addresses based on the first set of address bits received by the first portion of memory elements; and
a second address driver to provide a remaining portion of the address of the set of addresses based on a second set of address bits received by the second portion of memory elements, wherein the array of fluid actuating devices is arranged as a column extending longitudinally between the first address driver and the second address driver,
wherein the fluid actuators of the column of fluid actuators are arranged to form a number of primitives, the fluid actuators of each primitive addressable by the set of addresses with each fluid actuator corresponding to a different of the addresses of the set of addresses, where each memory element of a third portion of memory elements corresponds to a different one of the primitives.