	US 11,916,666 B2
	Transmitter and method for generating additional parity thereof
Hong-Sil Jeong, Suwon-si (KR); Kyung-Joong Kim, Seoul (KR); and Se-ho Myung, Yongin-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-do (KR)
Filed on Jan. 17, 2023, as Appl. No. 18/155,645.
Application 18/155,645 is a continuation of application No. 17/212,389, filed on Mar. 25, 2021, granted, now 11,595,151.
Application 17/212,389 is a continuation of application No. 16/502,891, filed on Jul. 3, 2019, granted, now 10,979,174, issued on Apr. 13, 2021.
Application 16/502,891 is a continuation of application No. 16/169,332, filed on Oct. 24, 2018, granted, now 10,389,480, issued on Aug. 20, 2019.
Application 16/169,332 is a continuation of application No. 15/053,101, filed on Feb. 25, 2016, granted, now 10,142,055, issued on Nov. 27, 2018.
Claims priority of provisional application 62/120,564, filed on Feb. 25, 2015.
Claims priority of application No. 10-2015-0137179 (KR), filed on Sep. 27, 2015.
Prior Publication US 2023/0155723 A1, May 18, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 1/00 (2006.01); H03M 13/11 (2006.01); H03M 13/25 (2006.01); H03M 13/27 (2006.01); H03M 13/37 (2006.01); H03M 13/00 (2006.01); H04L 27/20 (2006.01); H03M 13/15 (2006.01)

CPC H04L 1/0041 (2013.01) [H03M 13/1165 (2013.01); H03M 13/255 (2013.01); H03M 13/2707 (2013.01); H03M 13/2778 (2013.01); H03M 13/3761 (2013.01); H03M 13/3769 (2013.01); H03M 13/6356 (2013.01); H03M 13/6362 (2013.01); H04L 1/0045 (2013.01); H04L 1/0057 (2013.01); H04L 1/0065 (2013.01); H04L 1/0067 (2013.01); H04L 1/0071 (2013.01); H03M 13/152 (2013.01); H04L 27/20 (2013.01)]

6 Claims

1. A transmitting method comprising:

filling information bits with input bits and one or more zero padding bits, if a size of the input bits is less than a size of the information bits;

encoding the information bits to generate parity bits based on a low density parity check (LDPC) code, a code rate of the LDPC code being 3/15 and a code length of the LDPC code being 16200 bits;

splitting a codeword comprising the information bits and the parity bits into a plurality of bit groups;

interleaving bit groups including the parity bits among the plurality of bit groups based on a permutation order to provide an interleaved codeword;

calculating a number of parity bits to be punctured;

puncturing one or more parity bits of the interleaved codeword based on the calculated number;

mapping the input bits and remaining parity bits of the interleaved codeword after the puncturing to constellation points for quadrature phase shift keying (QPSK); and

transmitting a signal which is generated based on the constellation points,

wherein bits of 20^th, 24^th, 44^th, 12^th, 22^nd, 40^th, 19^th, 32^nd, 38^th, 41^st, 30^th, 33^rd, 14^th, 28^th, 39^thand 42^ndbit groups among the plurality of bit groups are punctured.