US 11,916,602 B2
Remote memory architectures enabled by monolithic in-package optical i/o
Roy Edward Meade, Lafayette, CA (US); Vladimir Stojanovic, Berkeley, CA (US); Chen Sun, Berkeley, CA (US); Mark Wade, Berkeley, CA (US); Hugo Saleh, Tuscaloosa, AL (US); and Charles Wuischpard, Danville, CA (US)
Assigned to Ayar Labs, Inc., Santa Clara, CA (US)
Filed by Ayar Labs, Inc., Santa Clara, CA (US)
Filed on Feb. 14, 2021, as Appl. No. 17/175,677.
Claims priority of provisional application 63/127,116, filed on Dec. 17, 2020.
Claims priority of provisional application 62/977,047, filed on Feb. 14, 2020.
Prior Publication US 2021/0258078 A1, Aug. 19, 2021
Int. Cl. H04B 10/00 (2013.01); H04B 10/80 (2013.01); H04B 10/516 (2013.01); G11C 5/04 (2006.01); G11C 5/06 (2006.01); G11C 11/42 (2006.01); G02B 6/42 (2006.01); G11C 5/14 (2006.01); H04J 14/00 (2006.01)
CPC H04B 10/80 (2013.01) [G02B 6/4249 (2013.01); G02B 6/4274 (2013.01); G11C 5/04 (2013.01); G11C 5/06 (2013.01); G11C 5/141 (2013.01); G11C 11/42 (2013.01); H04B 10/516 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A remote memory system, comprising:
a substrate of a multi-chip package, wherein the substrate includes a redistribution layer structure;
an integrated circuit chip flip-chip connected to the redistribution layer structure of the substrate, the integrated circuit chip including a high-bandwidth memory interface; and
an electro-optical chip flip-chip connected to the redistribution layer structure of the substrate, the electro-optical chip having an electrical interface electrically connected to the high-bandwidth memory interface of the integrated circuit chip, the electro-optical chip including a photonic interface configured to optically connect with an optical link, the electro-optical chip including at least one optical macro, each of the at least one optical macro configured to convert outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals, each of the at least one optical macro configured to transmit the outgoing optical data signals through the photonic interface to the optical link, each of the at least one optical macro configured to convert incoming optical data signals received through the photonic interface from the optical link into incoming electrical data signals, each of the at least one optical macro configured to transmit the incoming electrical data signals through the electrical interface to the high-bandwidth memory interface.