US 11,916,544 B2
Short circuit detection and limiting channel current in transistor before turn off in short circuit condition
Sergio Morini, Pavia (IT); Andrea Lampredi, Leghorn (IT); Salviano Marino, Latronico (IT); and Daniele Miatton, Carbonara al Ticino (IT)
Assigned to Infineon Technologies Austria AG, Villach (AT)
Filed by Infineon Technologies Austria AG, Villach (AT)
Filed on Mar. 1, 2022, as Appl. No. 17/683,804.
Prior Publication US 2023/0283273 A1, Sep. 7, 2023
Int. Cl. H03K 17/08 (2006.01); H02H 9/02 (2006.01); H02H 1/00 (2006.01)
CPC H03K 17/08 (2013.01) [H02H 1/0007 (2013.01); H02H 9/02 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A driver system configured to drive a load, the driver system comprising:
a power transistor including a control terminal, the power transistor is configured to receive a control voltage at the control terminal and conduct a load current based on the control voltage;
an overcurrent monitoring circuit configured to compare a measurement signal that is representative of the load current to a comparator threshold that corresponds to an overcurrent threshold, generate a first fault signal in response to the measurement signal exceeding the comparator threshold for a first time interval, and generate a second fault signal in response to the measurement signal exceeding the comparator threshold for a second time interval, wherein the second time interval is greater than the first time interval;
a gate driver circuit coupled to the control terminal, the gate driver circuit configured to regulate the control voltage to drive the power transistor between switching states to control the load current, wherein the gate driver circuit is configured to regulate the control voltage to turn off the power transistor in response to the overcurrent monitoring circuit generating the second fault signal; and
a current limiting circuit connected to the control terminal of the power transistor, wherein, in response to the overcurrent monitoring circuit generating the first fault signal, the current limiting circuit is configured to adjust the control voltage to an adjusted voltage level in order to limit the load current to a reduced current level that is preconfigured to be greater than the overcurrent threshold, wherein the adjusted voltage level is sufficient to maintain the power transistor in an on-state.