CPC H01L 29/78391 (2014.09) [H01L 21/383 (2013.01); H01L 21/447 (2013.01); H01L 29/4908 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H01L 27/1207 (2013.01)] | 20 Claims |
1. A method of manufacturing a semiconductor device, comprising:
forming a semiconductor layer and forming a dielectric layer;
performing a pressurized treatment to transform the semiconductor layer into a low-doping semiconductor layer and transform the dielectric layer into a crystalline ferroelectric layer;
forming a gate layer;
forming an insulating layer over the gate layer, the crystalline ferroelectric layer and the low-doping semiconductor layer;
forming contact openings in the insulating layer exposing portions of the low-doping semiconductor layer; and
forming source and drain terminals on the low-doping semiconductor layer.
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