US 11,916,138 B2
Etch stop layer for injecting carriers into drift layer for a vertical power device
Paul M Moore, Hillsboro, OR (US); Vladimir Rodov, Seattle, WA (US); and Richard A Blanchard, Los Altos, CA (US)
Assigned to PAKAL TECHNOLOGIES, INC, San Francisco, CA (US)
Filed by Pakal Technologies, Inc., San Francisco, CA (US)
Filed on Apr. 20, 2022, as Appl. No. 17/725,326.
Claims priority of provisional application 63/178,198, filed on Apr. 22, 2021.
Prior Publication US 2022/0344498 A1, Oct. 27, 2022
Int. Cl. H01L 29/745 (2006.01); H01L 29/66 (2006.01); H01L 29/74 (2006.01)
CPC H01L 29/7455 (2013.01) [H01L 29/66363 (2013.01); H01L 29/7424 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A method for forming a vertical power device comprising:
providing a silicon substrate wafer having a top surface and a bottom surface;
forming a silicon p− type etch stop layer over or in the top surface of the wafer, the etch stop layer having an etch rate, when using a first type of etchant material, lower than the etch rate of the wafer underlying the etch stop layer, wherein the etch rate of the etch stop layer is determined by a p− type dopant concentration in the etch stop layer, the etch stop layer being conductive;
epitaxially growing a drift layer overlying the etch stop layer;
forming one or more doped regions in or over the drift layer;
etching at least a portion of the wafer, using the first type of etchant material, to remove the wafer while retaining the etch stop layer such that the etch stop layer has an exposed surface, the etch stop layer automatically reducing the etch rate; and
forming a metal electrode on the exposed surface of the etch stop layer, whereby, when the device is turned on and conducting a vertical current, the current flows through the metal electrode and the etch stop layer.