US 11,916,078 B2
Semiconductor devices
Sohyeon Lee, Suwon-si (KR); Sungsu Moon, Hwaseong-si (KR); Jaeduk Lee, Seongnam-si (KR); and Ikhyung Joo, Seongnam-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jun. 30, 2022, as Appl. No. 17/854,128.
Application 17/854,128 is a continuation of application No. 17/154,583, filed on Jan. 21, 2021, granted, now 11,380,711.
Claims priority of application No. 10-2020-0052692 (KR), filed on Apr. 29, 2020.
Prior Publication US 2022/0336501 A1, Oct. 20, 2022
Int. Cl. H01L 27/12 (2006.01); H01L 21/8234 (2006.01); H01L 21/84 (2006.01); H01L 27/088 (2006.01); H01L 29/08 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01)
CPC H01L 27/1207 (2013.01) [H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/823456 (2013.01); H01L 21/823487 (2013.01); H01L 21/84 (2013.01); H01L 27/0886 (2013.01); H01L 29/0843 (2013.01); H01L 29/41733 (2013.01); H01L 29/41791 (2013.01); H01L 29/4236 (2013.01); H01L 29/42392 (2013.01); H01L 29/7831 (2013.01); H01L 29/785 (2013.01); H01L 29/78642 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate having an active region defined by a device isolation film, the active region providing a first channel region;
a first source/drain region in the active region on first and second sides of the first channel region;
a gate structure having a first gate insulating film, a shared gate electrode, and a second gate insulating film sequentially arranged on the active region, the shared gate electrode having an extended portion on the device isolation film;
a cover semiconductor layer on the second gate insulating film and electrically separated from the active region to provide a second channel region;
a second source/drain region in the cover semiconductor layer on first and second sides of the second channel region;
first and second source/drain contacts respectively connected to the first and second source/drain regions; and
a shared gate contact connected to the extended portion of the shared gate electrode.