US 11,915,882 B2
Ceramic electronic device and manufacturing method of the same
Hidetoshi Masuda, Takasaki (JP); Kotaro Mizuno, Takasaki (JP); and Koichi Tsukagoshi, Takasaki (JP)
Assigned to TAIYO YUDEN CO., LTD., Tokyo (JP)
Filed by TAIYO YUDEN CO., LTD., Tokyo (JP)
Filed on Aug. 30, 2022, as Appl. No. 17/899,444.
Claims priority of application No. 2021-150703 (JP), filed on Sep. 16, 2021.
Prior Publication US 2023/0084921 A1, Mar. 16, 2023
Int. Cl. H01G 4/30 (2006.01); H01G 4/012 (2006.01); C04B 35/64 (2006.01); H01G 4/12 (2006.01); C04B 35/468 (2006.01); H01G 4/008 (2006.01)
CPC H01G 4/30 (2013.01) [C04B 35/4682 (2013.01); C04B 35/64 (2013.01); H01G 4/008 (2013.01); H01G 4/012 (2013.01); H01G 4/1227 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A ceramic electronic device comprising:
a multilayer chip in which a dielectric layer and an internal electrode layer are alternately stacked,
wherein concentration peaks of two or more types of metals different from a main component metal of the internal electrode layer exist at different positions in a stacking direction of the dielectric layer and the internal electrode layer, between the dielectric layer and the internal electrode layer.