US 11,915,791 B2
Memory topologies
Matthew B. Leslie, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Nov. 28, 2022, as Appl. No. 17/994,848.
Application 17/994,848 is a continuation of application No. 17/466,961, filed on Sep. 3, 2021, granted, now 11,514,961.
Claims priority of provisional application 63/075,049, filed on Sep. 4, 2020.
Prior Publication US 2023/0154512 A1, May 18, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 8/18 (2006.01); G06F 15/173 (2006.01); G11C 7/10 (2006.01); G11C 8/06 (2006.01); G11C 5/06 (2006.01)
CPC G11C 8/18 (2013.01) [G06F 15/173 (2013.01); G11C 5/06 (2013.01); G11C 7/1039 (2013.01); G11C 8/06 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a first plurality of clam-shell paired memory devices arranged in a star-connection topology, each clam-shelled pair of the first plurality of memory devices being coupled by a respective impedance matched branch to a first common signal trace; and
a second plurality of memory devices coupled to a second common signal trace.