US 11,914,903 B2
Systems, methods, and devices for accelerators with virtualization and tiered memory
Yang Seok Ki, Palo Alto, CA (US); Krishna T. Malladi, San Jose, CA (US); and Rekha Pitchumani, Oak Hill, VA (US)
Assigned to SAMSUNG ELECTRONICS CO., LTD., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 8, 2021, as Appl. No. 17/497,882.
Claims priority of provisional application 63/090,710, filed on Oct. 12, 2020.
Prior Publication US 2022/0113915 A1, Apr. 14, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0664 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A device comprising:
an interconnect interface;
a memory system comprising:
one or more first-type memory devices configured to be high-bandwidth coupled to the interconnect interface through a memory switch, to receive first data;
one or more second-type memory devices coupled to be low-latency, coupled to the interconnect interface through the memory switch to receive second data; and
an accelerator coupled through the memory switch to the one or more first-type memory devices and the one or more second-type memory devices and configured to perform an operation using the first data and the second data, wherein the memory switch is programmable to configure the one or more first-type memory devices and the one or more second-type memory devices.