US 11,914,445 B2
Management of power to internal subsystems within a system on chip
Bartosz Gajda, Trondheim (NO); and Frode Pedersen, Trondheim (NO)
Assigned to Nordic Semiconductor ASA, Trondheim (NO)
Appl. No. 17/787,130
Filed by Nordic Semiconductor ASA, Trondheim (NO)
PCT Filed Dec. 18, 2020, PCT No. PCT/EP2020/087292
§ 371(c)(1), (2) Date Jun. 17, 2022,
PCT Pub. No. WO2021/123361, PCT Pub. Date Jun. 24, 2021.
Claims priority of application No. 1919050 (GB), filed on Dec. 20, 2019.
Prior Publication US 2023/0064867 A1, Mar. 2, 2023
Int. Cl. G06F 1/32 (2019.01); G06F 1/3206 (2019.01); G06F 1/3296 (2019.01)
CPC G06F 1/3206 (2013.01) [G06F 1/3296 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An electronic device comprising:
a system on chip, including:
a plurality of internal subsystems; and
a power management system comprising a plurality of internal voltage regulators arranged to supply power to the plurality of internal subsystems, each of the internal voltage regulators having an associated current limiter; and
an external module comprising at least one external voltage regulator and connected to the system on chip such that the external voltage regulator can provide power to at least one of said internal subsystems on the system on chip,
wherein the power management system is arranged during a start-up phase to enable said internal voltage regulators and said current limiters and in a subsequent phase to:
determine a first set of the internal subsystems powered by the external voltage regulator(s) and a second set of the internal subsystems not powered by the external voltage regulator(s);
disable one or more of said internal voltage regulators corresponding to the first set of internal subsystems; and
disable one or more of said current limiters associated with the internal voltage regulators which correspond to the second set of internal subsystems.