US 11,914,440 B2
Protocol level control for system on a chip (SoC) agent reset and power management
Shailendra Desai, Ahmedabad (IN); Mark Pearce, San Francisco, CA (US); Amit Jain, Ahmedabad (IN); and Jaymin Patel, Ahmedabad (IN)
Assigned to Google LLC, Mountain View, CA (US)
Filed by Google LLC, Mountain View, CA (US)
Filed on Mar. 24, 2022, as Appl. No. 17/656,378.
Application 17/656,378 is a continuation of application No. 16/368,443, filed on Mar. 28, 2019, granted, now 11,340,671.
Claims priority of provisional application 62/691,117, filed on Jun. 28, 2018.
Claims priority of provisional application 62/650,589, filed on Mar. 30, 2018.
Prior Publication US 2022/0214731 A1, Jul. 7, 2022
Int. Cl. G06F 1/24 (2006.01); G06F 1/32 (2019.01); G06F 15/78 (2006.01); G06F 1/324 (2019.01); G06F 1/3234 (2019.01); G06F 9/54 (2006.01); G06F 11/14 (2006.01); G06N 5/043 (2023.01); H04L 9/08 (2006.01)
CPC G06F 1/24 (2013.01) [G06F 1/324 (2013.01); G06F 1/3243 (2013.01); G06F 9/542 (2013.01); G06F 11/1402 (2013.01); G06F 15/7807 (2013.01); G06N 5/043 (2013.01); H04L 9/085 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A System on a Chip (SoC), comprising:
an interconnect for handling transactional traffic between a plurality of circuit subsystems on the SoC, the interconnect comprising a port, the plurality of circuit subsystems including a first circuit subsystem configured to initiate a subsystem wake-up sequence to enable the first circuit subsystem to resume normal operation, the subsystem wake-up sequence involving:
the first circuit subsystem sending a wake-up request signal over a link to the interconnect in response to a wake-up trigger event while the first circuit subsystem is in an inoperable state and the link is in a quiescent state, the wake-up trigger event comprising an event related to the first circuit subsystem;
the interconnect, in response to detecting the wake-up request signal from the first circuit subsystem, notifying a system controller, the system controller in an awake state, that the wake-up request signal was detected; and
the system controller, in response to the notifying, sending a command over the interconnect to the first circuit subsystem, the command directing the first circuit subsystem to initiate the subsystem wake-up sequence to exit the inoperable state.