US 12,239,031 B2
Memory cell, semiconductor device having the same, and methods of manufacturing the same
Yu-Chao Lin, Hsinchu (TW); Yu-Sheng Chen, Taoyuan (TW); and Da-Ching Chiou, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 20, 2021, as Appl. No. 17/380,051.
Claims priority of provisional application 63/178,533, filed on Apr. 23, 2021.
Prior Publication US 2022/0344583 A1, Oct. 27, 2022
Int. Cl. H10N 70/20 (2023.01); H01L 23/528 (2006.01); H10B 63/10 (2023.01); H10N 70/00 (2023.01)
CPC H10N 70/231 (2023.02) [H01L 23/5283 (2013.01); H10B 63/10 (2023.02); H10N 70/063 (2023.02); H10N 70/8265 (2023.02); H10N 70/841 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A memory cell, comprising: a dielectric structure; a storage element structure, disposed in the dielectric structure, comprising: a first portion, comprising a first side and a second side opposite to the first side, a width of the first side being less than a width of the second side; and a second portion, connected to the second side of the first portion, a maximum width of the second portion being greater than the width of the first side, wherein a first horizontal surface of the storage element structure is substantially level with a second horizontal surface of the dielectric structure, and a third horizontal surface of the storage element structure is substantially level with a fourth horizontal surface of the dielectric structure, wherein the first horizontal surface is opposite to the third horizontal surface, and the second horizontal surface is opposite to the fourth horizontal surface; and a top electrode, disposed on the storage element structure, wherein the second portion is disposed between the first portion and the top electrode, and a width of the top electrode is greater than the maximum width of the second portion.