US 12,238,930 B2
Semiconductor memory device with increased reliability and method for manufacturing the same
Masaki Noguchi, Yokkaichi Mie (JP); and Tatsunori Isogai, Yokkaichi Mie (JP)
Assigned to Kioxia Corporation, (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Sep. 2, 2021, as Appl. No. 17/465,496.
Claims priority of application No. 2021-046191 (JP), filed on Mar. 19, 2021.
Prior Publication US 2022/0302139 A1, Sep. 22, 2022
Int. Cl. H10B 43/35 (2023.01); H01L 23/528 (2006.01); H10B 43/27 (2023.01)
CPC H10B 43/35 (2023.02) [H01L 23/5283 (2013.01); H10B 43/27 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a stacked body having insulating layers and conductive layers alternately stacked along a first direction;
a semiconductor layer disposed along the first direction in the stacked body;
a first insulating film disposed along the first direction between the stacked body and the semiconductor layer;
a second insulating film disposed along the first direction between the stacked body and the first insulating film;
a third insulating film disposed along the first direction between the stacked body and the second insulating film; and
a fourth insulating film having: (i) a first portion disposed between one of the conductive layers and the third insulating film, and (ii) a second portion disposed along a second direction that intersects the first direction and between one of the conductive layers and one of the insulating layers, the second portion being connected to the first portion, wherein
the first insulating film, the second insulating film, the third insulating film, and the fourth insulating film comprise deuterium,
the second insulating film has a greater concentration of deuterium than the first insulating film,
the first insulating film has a greater concentration of deuterium than the first portion, and
the first portion has a greater concentration of deuterium than the third insulating film.