US 12,238,917 B2
Memory device having laterally extending capacitors of different lengths and levels
Hsih-Yang Chiu, Taoyuan (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Jul. 1, 2022, as Appl. No. 17/855,949.
Prior Publication US 2024/0008250 A1, Jan. 4, 2024
Int. Cl. H10B 12/00 (2023.01); H01L 49/02 (2006.01)
CPC H10B 12/30 (2023.02) [H01L 28/40 (2013.01); H01L 28/60 (2013.01); H01L 28/82 (2013.01); H10B 12/31 (2023.02); H01L 2924/1205 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19104 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a semiconductor substrate; and
a first capacitor, which comprises:
a first insulating layer disposed over the semiconductor substrate;
a first bottom electrode disposed over the first insulating layer at a position that a top surface of the first insulating layer is in contact with a bottom surface of the first bottom electrode while a bottom surface of the first insulating layer is in contact with a top surface of the semiconductor substrate;
a first dielectric layer disposed over the first bottom electrode;
a first recess extending through the first dielectric layer to expose a portion of a top surface of the first bottom electrode as a bottom wall of the first recess;
a first capacitor dielectric conformal to the first recess and in contact with the first bottom electrode, wherein the first capacitor dielectric is disposed along a sidewall of the first recess and the bottom wall of the first recess at the top surface of the first bottom electrode, such that a height of the first capacitor dielectric is equal to a thickness of the first dielectric layer; and
a first top electrode disposed within the first recess and surrounded by the first capacitor dielectric,
wherein the first capacitor dielectric and the first top electrode extend laterally over the first bottom electrode, the first insulating layer, and the semiconductor substrate.