| CPC H04N 23/651 (2023.01) [H04N 23/665 (2023.01)] | 20 Claims |
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1. An image sensor comprising:
an interface circuit configured to receive compressed data from an external processor;
at least one memory configured to store the compressed data; and
a control logic circuit configured to decompress the compressed data based on an initialized first clock rate,
wherein, after the control logic circuit decompresses the compressed data, the first clock rate is reset to a second clock rate.
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