a low-voltage differential signaling (LVDS) driver, wherein the LVDS driver is configured to provide a differential signal that is based on a digital bit stream, wherein the digital bit stream comprises a series of digital bits that are temporally arranged based on a nominal bit period; and

a controllable delay device, wherein the controllable delay device is configured to provide a delay signal to the LVDS driver so as to cause a rising edge or a falling edge of respective digital bits to vary in time with respect to the nominal bit period based on a predetermined sequence of delay amounts, wherein the delay amounts represent positive and negative differences in time from the nominal bit period.