CPC H04B 1/7174 (2013.01) [H03M 13/41 (2013.01); H04B 1/38 (2013.01)] | 16 Claims |
1. An apparatus for higher data rate transmission, comprising:
a convolutional encoder configured to:
receive an input data bit;
encode the input data bit to generate two coded data bits, g0 and g1; and
develop a convolutionally encoded symbol;
a symbol mapper configured to map the two encoded data bits to a symbol, wherein in a first mode of operation the symbol mapper is configured to:
map g0 to a first set of 4 pulses in a first symbol;
insert a first guard interval comprising 4 silent chips in the first symbol;
map g1 to a second set of 4 pulses in the first symbol; and
insert a second guard interval comprising 4 silent chips in the first symbol;
wherein in a second mode of operation the symbol mapper is configured to:
map g0 to a third set of 2 pulses in a second symbol;
insert a third guard interval comprising 2 silent chips in the second symbol;
map g1 to a fourth set of 2 pulses in the second symbol; and
insert a fourth guard interval comprising 2 silent chips in the second symbol.
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