US 12,237,847 B2
DWA circuit and DA conversion apparatus
Daisuke Matsuoka, Tokyo (JP); and Tatsuya Chubachi, Tokyo (JP)
Assigned to Asahi Kasei Microdevices Corporation, Tokyo (JP)
Filed by Asahi Kasei Microdevices Corporation, Tokyo (JP)
Filed on Nov. 11, 2022, as Appl. No. 17/985,168.
Claims priority of application No. 2021-200339 (JP), filed on Dec. 9, 2021.
Prior Publication US 2023/0188160 A1, Jun. 15, 2023
Int. Cl. H03M 1/00 (2006.01); G06F 5/01 (2006.01); H03M 1/66 (2006.01); H03M 3/00 (2006.01); H03M 7/16 (2006.01)
CPC H03M 7/165 (2013.01) [G06F 5/01 (2013.01); H03M 1/66 (2013.01); H03M 3/50 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A Data Weighted Averaging (DWA) circuit comprising:
a thermometer conversion unit configured to convert an input digital signal into a thermometer code;
a shift amount storage unit configured to store a shift amount by which the thermometer code is to be cyclically shifted;
a shift unit configured to cyclically shift the thermometer code by the shift amount;
an arrangement conversion unit configured to supply, to an analog output circuit, an output control code obtained by converting a bit arrangement of a shifted code output by the shift unit; and
an update unit configured to update the shift amount according to a value of the input digital signal, wherein
the shifted code includes a plurality of unconverted bit fields, each of which has a consecutive predetermined first number of bits,
the output control code includes a plurality of converted bit fields, each of which has a consecutive predetermined second number of bits,
a number of the unconverted bit fields is smaller than a number of the converted bit fields, and
the arrangement conversion unit is configured to perform arrangement conversions on a plurality of bits having a same position in a bit field in the plurality of unconverted bit fields, to arrange the plurality of bits in a same converted bit field among the plurality of converted bit fields.