US 12,237,832 B2
Circuits and methods for supply voltage detection and timing monitoring
Miguel Bautista Gabriel, Portland, OR (US); Sriram Vangal, Portland, OR (US); Patrick Koeberl, Portland, OR (US); Pratik Patel, Hillsboro, OR (US); Muhammad Khellah, Tigard, OR (US); James Tschanz, Portland, OR (US); Carlos Tokunaga, Beaverton, OR (US); and Suyoung Bang, Hillsboro, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 20, 2021, as Appl. No. 17/479,963.
Prior Publication US 2022/0006459 A1, Jan. 6, 2022
Int. Cl. H03K 19/177 (2020.01); G01R 31/28 (2006.01); H03K 19/0175 (2006.01); H03K 19/0185 (2006.01); H03K 19/17768 (2020.01); H03K 19/17784 (2020.01)
CPC H03K 19/17768 (2013.01) [G01R 31/2827 (2013.01); H03K 19/01759 (2013.01); H03K 19/01855 (2013.01); H03K 19/17784 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A detection circuit comprising:
a tunable delay circuit that generates a delayed signal in response to an input signal, wherein the tunable delay circuit receives a supply voltage;
a control circuit that adjusts a delay provided by the tunable delay circuit to the delayed signal relative to the input signal; and
a time-to-digital converter circuit that converts the delay provided by the tunable delay circuit to the delayed signal to a digital code, wherein the time-to-digital converter circuit adjusts the digital code based on changes in the supply voltage, and
wherein the control circuit causes the tunable delay circuit to maintain the delay provided to the delayed signal constant in response to a value of the digital code reaching an alignment value.