| CPC H02M 3/157 (2013.01) [H02M 1/0009 (2021.05); H02M 1/0025 (2021.05); H02J 2207/20 (2020.01)] | 17 Claims |

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1. A switching charger having fast dynamic response for transition of a load, comprising:
a high-side switch, wherein a first terminal of the high-side switch is coupled to an input voltage;
a low-side switch, wherein a first terminal of the low-side switch is connected to a second terminal of the high-side switch, a second terminal of the low-side switch is grounded, a node between the first terminal of the low-side switch and the second terminal of the high-side switch is connected to a first terminal of an inductor, a second terminal of the inductor is connected to a first terminal of an output capacitor, a second terminal of the output capacitor is grounded, and an output node between the second terminal of the inductor and the first terminal of the output capacitor is connected to the load;
a driver circuit connected to a control terminal of the high-side switch and a control terminal of the low-side switch, and configured to drive the high-side switch and the low-side switch;
a constant on-time circuit configured to obtain the input voltage, configured to obtain a voltage of the output node as an output voltage of the switching charger, configured to determine a duty cycle or a width of a pulse wave of an on-time signal according to the input voltage and the output voltage of the switching charger, and configured to output the on-time signal;
a control circuit connected to the driver circuit and the constant on-time circuit, and configured to control the driver circuit according to the on-time signal;
a current sensor circuit connected between the output node and a battery, and configured to sense a charging current that flows to the battery from the output node to output a current sensed signal; and
a voltage parking circuit connected to the current sensor circuit and the second input terminal of the comparator, and configured to output a voltage parked signal according to the current sensed signal;
an error amplifier, wherein a first input terminal of the error amplifier is connected to the output node, and a second input terminal of the error amplifier is connected to a first reference voltage; and
a comparator, wherein a first input terminal of the comparator is connected to a ramp signal generator and configured to receive a ramp signal from the ramp signal generator, a second input terminal of the comparator is connected to an output terminal of the error amplifier and an output terminal of the voltage parking circuit, and an output terminal of the comparator is connected to the control circuit.
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