US 12,237,759 B2
High-efficiency integrated power circuit with reduced number of semiconductor elements and multiple output ports
Jeong Eon Park, Daejeon (KR); and Jung Kyu Han, Seoul (KR)
Assigned to Korea Aerospace Research Institute, Daejeon (KR)
Filed by Korea Aerospace Research Institute, Daejeon (KR)
Filed on Jul. 21, 2022, as Appl. No. 17/870,360.
Claims priority of application No. 10-2021-0127787 (KR), filed on Sep. 28, 2021.
Prior Publication US 2023/0098360 A1, Mar. 30, 2023
Int. Cl. H02M 3/335 (2006.01); H02M 1/00 (2006.01); H02M 3/158 (2006.01)
CPC H02M 1/0095 (2021.05) [H02M 3/33561 (2013.01); H02M 3/33569 (2013.01); H02M 3/158 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A high-efficiency integrated power circuit of an integrated converter, the high-efficiency integrated power circuit comprising:
an input port, which is a first port, to which power for driving the integrated converter is input, wherein the input port includes a first terminal and a second terminal;
a first switch connected to the first terminal of the input port;
a second switch connected to the second terminal of the input port;
a first inductor connected in series between the first switch and the second switch;
a non-isolated port, connected between the first switch and the first inductor, wherein the non-isolated port is a second port, for outputting, to outside the high-efficiency integrated power circuit, a first portion of power that is generated when power input through the input port passes through an input inductor; and
an isolated port, connected in parallel to the first inductor, wherein the isolated port is a third port, for conducting a second portion of power that is generated, excluding the first portion of power and for maintaining the conducted second portion of power inside the high-efficiency integrated power circuit.