CPC H02J 3/01 (2013.01) [H01F 27/26 (2013.01); H01F 27/28 (2013.01); H01F 27/40 (2013.01); H02J 3/241 (2020.01); H02J 3/26 (2013.01); H02J 3/38 (2013.01); H02M 7/44 (2013.01); H02J 3/36 (2013.01)] | 17 Claims |
1. A method for damping high-frequency components in an output current of a power electronics device having an inverter arrangement comprising at least two inverters and a transformer apparatus, wherein the inverter arrangement is electrically connected to the transformer apparatus on a primary side thereof, wherein at least two primary windings are inductively coupled to a common secondary winding in the transformer apparatus at least for a first phase, comprising:
during operation of the power electronics device, temporarily applying output voltages of a same phase but with a different voltage profile of the at least two inverters to at least the two primary windings, by virtue of the at least two inverters being driven with clock edges that are time-shifted with respect to one another with respect to the at least two output voltages, such that a sum of the at least two output voltages corresponds to a voltage profile with a higher clock frequency than clock frequencies of voltage profiles of the at least two output voltages individually.
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