US 12,237,442 B2
Photonic package laser area macro-void pressure relief micro-channels
Ankur Agarwal, Chandler, AZ (US); and Priyanka Dobriyal, Milpitas, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Nov. 20, 2020, as Appl. No. 17/100,595.
Claims priority of provisional application 63/043,325, filed on Jun. 24, 2020.
Prior Publication US 2021/0408339 A1, Dec. 30, 2021
Int. Cl. H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 33/26 (2010.01); H01L 33/40 (2010.01); H01L 33/48 (2010.01)
CPC H01L 33/483 (2013.01) [H01L 21/563 (2013.01); H01L 23/31 (2013.01); H01L 33/26 (2013.01); H01L 33/40 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic package, comprising:
a package substrate;
a die attached to the package substrate by interconnects, the interconnect comprising bumps having a pitch;
an underfill under the die and surrounding the interconnects, wherein a void is in the underfill;
a first vent along a first direction, wherein the first vent is fluidically coupled to the void and extends to an edge of the underfill, wherein the first vent is between a first bump and a second bump of the bumps having the pitch, and wherein a third bump of the bumps is spaced apart from the second bump by the pitch; and
a second vent, wherein the second vent intersects the void and extends to the edge of the underfill, the second vent along a second direction orthogonal to the first direction.