US 12,237,424 B2
Semiconductor device
Shunpei Yamazaki, Tokyo (JP); and Hideomi Suzawa, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Atsugi (JP)
Filed on Nov. 30, 2023, as Appl. No. 18/524,033.
Application 18/524,033 is a continuation of application No. 17/563,238, filed on Dec. 28, 2021, granted, now 11,837,666.
Application 17/563,238 is a continuation of application No. 16/554,723, filed on Aug. 29, 2019, granted, now 11,217,699, issued on Jan. 4, 2022.
Application 16/554,723 is a continuation of application No. 15/597,237, filed on May 17, 2017, granted, now 10,403,762, issued on Sep. 3, 2019.
Application 15/597,237 is a continuation of application No. 14/722,260, filed on May 27, 2015, granted, now 9,660,097, issued on May 23, 2017.
Application 14/722,260 is a continuation of application No. 13/868,420, filed on Apr. 23, 2013, granted, now 9,048,323, issued on Jun. 2, 2015.
Claims priority of application No. 2012-104286 (JP), filed on Apr. 30, 2012.
Prior Publication US 2024/0105853 A1, Mar. 28, 2024
Int. Cl. H01L 29/12 (2006.01); H01L 29/04 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/7869 (2013.01) [H01L 29/4908 (2013.01); H01L 29/517 (2013.01); H01L 29/518 (2013.01); H01L 29/78648 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first transistor;
a first insulating layer over the first transistor;
a second transistor over the first insulating layer; and
a capacitor electrically connected to the first transistor and the second transistor,
wherein the first transistor comprises:
a semiconductor layer comprising silicon;
a first gate insulating layer over the semiconductor layer;
a first gate electrode layer over the first gate insulating layer; and
a first source electrode layer and a first drain electrode layer over the semiconductor layer,
wherein the first insulating layer is provided over the first gate electrode layer and comprises silicon and nitrogen,
wherein the second transistor comprises:
a second gate electrode layer over the first insulating layer;
a second gate insulating layer over the second gate electrode layer;
an oxide semiconductor layer over the second gate insulating layer, the oxide semiconductor layer comprising In, Ga, and Zn,
a third gate insulating layer over the oxide semiconductor layer;
a third gate electrode layer over the third gate insulating layer; and
a second source electrode layer and a second drain electrode layer each having a region being in contact with a top surface of the oxide semiconductor layer,
wherein one of the second source electrode layer and the second drain electrode layer is electrically connected to the first gate electrode layer,
wherein a first electrode of the capacitor comprises a part of the one of the second source electrode layer and the second drain electrode layer,
wherein a second electrode of the capacitor comprises a first conductive layer provided over the one of the second source electrode layer and the second drain electrode layer, and
wherein a part of the first conductive layer overlaps with the first gate electrode layer.