| CPC H01L 29/785 (2013.01) [H01L 21/76243 (2013.01); H01L 21/76267 (2013.01); H01L 21/823431 (2013.01); H01L 21/845 (2013.01); H01L 27/0886 (2013.01); H01L 29/66795 (2013.01)] | 20 Claims |
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1. A device comprising:
isolation regions;
a first semiconductor fin and a second semiconductor fin parallel to each other and protruding higher than top surfaces of the isolation regions;
a first gate stack and a second gate stack crossing over the first semiconductor fin and the second semiconductor fin;
a first cut-metal isolation region and a second cut-metal isolation region parallel to the first semiconductor fin and the second semiconductor fin, wherein the first semiconductor fin and the second semiconductor fin are between the first cut-metal isolation region and the second cut-metal isolation region, and the first cut-metal isolation region and the second cut-metal isolation region both penetrate through the first gate stack and the second gate stack; and
a cut-fin isolation region between the first gate stack and the second gate stack, wherein the cut-fin isolation region has a first end contacting the first cut-metal isolation region and a second end contacting the second cut-metal isolation region to form a first distinguishable interface and a second distinguishable interface, respectively, and wherein the first distinguishable interface and the second distinguishable interface extend to a level lower than a bottom surface of the isolation regions, and a portion of the isolation regions between the first semiconductor fin and the second semiconductor fin is penetrated-through by the cut-fin isolation region.
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