| CPC H01L 29/7811 (2013.01) [H01L 27/088 (2013.01); H01L 29/1608 (2013.01); H01L 29/7804 (2013.01); H01L 29/7806 (2013.01)] | 12 Claims |
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1. A semiconductor device, comprising:
an element region including a transistor, a first diode, and a first contact portion;
a termination region surrounding the element region and including a second contact portion; and
an intermediate region provided between the element region and the termination region and not including the transistor, the first diode, the first contact portion, and the second contact portion,
wherein the element region includes:
a first electrode;
a second electrode;
a gate electrode;
a silicon carbide layer provided between the first electrode and the second electrode, having a first face on a side of the first electrode and a second face on a side of the second electrode, and including:
a first silicon carbide region of a first conductive type having a first region and a second region, the first region being in contact with the first face and facing the gate electrode, and the second region being in contact with the first face and in contact with the first electrode;
a second silicon carbide region of a second conductive type prodded between the first silicon carbide region and the first face, the second silicon carbide region being adjacent to the first region, the second silicon carbide region facing the gate electrode, and the second silicon carbide region being in contact with the first electrode at a first interface; and
a third silicon carbide region of a first conductive type provided between the second silicon carbide region and the first face and electrically connected to the first electrode; and
a gate insulating layer provided between the gate electrode and the second silicon carbide region and between the gate electrode and the first region,
the termination region includes:
a first wiring layer electrically connected to the first electrode;
the second electrode; and
the silicon carbide layer including the first silicon carbide region and a fourth silicon carbide region of a second conductive type, the fourth silicon carbide region provided between the first silicon carbide region and the first face, the fourth silicon carbide region being in contact with the first wiring layer at a second interface,
the intermediate region includes the silicon carbide layer including the first silicon carbide region and a fifth silicon carbide region of a second conductive type, the fifth silicon carbide region provided between the first silicon carbide region and the first face,
the transistor includes the gate electrode, the gate insulating layer, the first region, the second silicon carbide region, and the third silicon carbide region,
the first diode includes the first electrode and the second region,
the first contact portion includes the first interface,
the second contact portion includes the second interface, and
a width of the intermediate region in a direction from the element region to the termination region is equal to or more than twice a thickness of the silicon carbide layer.
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