CPC H01L 29/6656 (2013.01) [H01L 21/0214 (2013.01); H01L 21/02167 (2013.01); H01L 21/0217 (2013.01); H01L 21/26513 (2013.01); H01L 21/324 (2013.01); H01L 29/0847 (2013.01); H01L 29/66545 (2013.01); H01L 29/6659 (2013.01); H01L 29/7833 (2013.01); H01L 21/0206 (2013.01); H01L 21/28088 (2013.01); H01L 21/3212 (2013.01); H01L 21/32133 (2013.01); H01L 29/42376 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/6653 (2013.01)] | 1 Claim |
1. A method for fabricating semiconductor device, comprising:
forming a gate structure on a substrate;
forming a first spacer adjacent to and directly contacting the gate structure, wherein the first spacer comprises silicon carbon nitride (SiCN) and a L-shape;
forming a second spacer adjacent to and directly contacting the first spacer, wherein the second spacer comprises silicon oxycarbonitride (SiOCN) and a L-shape;
forming a third spacer adjacent to and directly contacting the second spacer, wherein the third spacer comprises SiCN and an I-shape;
forming a fourth spacer adjacent to the third spacer, wherein the fourth spacer contacts the first spacer, the second spacer, and the third spacer directly, top surfaces of the fourth spacer and the gate structure are coplanar, and the fourth spacer is disposed not directly above the gate structure; and
forming a source/drain region adjacent to two sides of the third spacer.
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