US 12,237,394 B2
Semiconductor device and method for fabricating the same
Yi-Fan Li, Tainan (TW); Wen-Yen Huang, Changhua County (TW); Shih-Min Chou, Tainan (TW); Zhen Wu, Kaohsiung (TW); Nien-Ting Ho, Tainan (TW); Chih-Chiang Wu, Tainan (TW); and Ti-Bin Chen, Tainan (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Jul. 26, 2023, as Appl. No. 18/226,262.
Application 18/226,262 is a division of application No. 17/709,385, filed on Mar. 30, 2022, granted, now 11,757,016.
Application 16/907,287 is a division of application No. 16/177,368, filed on Oct. 31, 2018, granted, now 10,734,496, issued on Aug. 4, 2020.
Application 17/709,385 is a continuation of application No. 16/907,287, filed on Jun. 21, 2020, granted, now 11,322,598, issued on May 3, 2022.
Claims priority of application No. 107134933 (TW), filed on Oct. 3, 2018.
Prior Publication US 2023/0369441 A1, Nov. 16, 2023
Int. Cl. H01L 29/49 (2006.01); H01L 27/092 (2006.01); H01L 29/40 (2006.01)
CPC H01L 29/4966 (2013.01) [H01L 27/092 (2013.01); H01L 29/401 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A method for fabricating semiconductor device, comprising:
providing a substrate having a first region and a second region, wherein the first region comprises a PMOS region and the second region comprises a NMOS region;
forming a first bottom barrier metal (BBM) layer on the first region and the second region;
forming a first work function metal (WFM) layer on the first BBM layer on the first region and the second region;
forming a diffusion barrier layer on the first WFM layer; and
removing the diffusion barrier layer on the second region.