CPC H01L 29/0669 (2013.01) [H01L 21/823431 (2013.01); H01L 27/0924 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01)] | 20 Claims |
1. A device, comprising:
a substrate;
a first semiconductor channel over the substrate, including:
a first nanosheet of a first semiconductor material;
a second nanosheet of a second semiconductor material in physical contact with a topside surface of the first nanosheet; and
a third nanosheet of the second semiconductor material in physical contact with an underside surface of the first nanosheet;
a first gate structure wrapping around the first semiconductor channel and in physical contact with the second nanosheet and the third nanosheet;
a second semiconductor channel over the substrate, the second semiconductor channel including a fourth nanosheet of the first semiconductor material;
a second gate structure wrapping around the second semiconductor channel and in physical contact with the fourth nanosheet; and
an inner spacer having a sidewall in direct contact with the second gate structure in a lateral direction, and having an uppermost surface separated from the fourth nanosheet by a fifth nanosheet of the second semiconductor material.
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