	US 12,237,351 B2
	Semiconductor package structure and related methods
Yu-Te Hsieh, Taoyuan (TW)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Jun. 10, 2021, as Appl. No. 17/344,082.
Application 17/344,082 is a continuation of application No. 16/177,697, filed on Nov. 1, 2018, granted, now 11,037,970.
Prior Publication US 2021/0305301 A1, Sep. 30, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 27/146 (2006.01)

CPC H01L 27/14618 (2013.01) [H01L 27/14636 (2013.01); H01L 27/14683 (2013.01)]

19 Claims

1. A semiconductor package comprising:

a substrate;

a die coupled to the substrate;

a glass lid coupled over the die, the glass lid comprising an inner surface facing the die, an outer surface opposite the inner surface, and a sidewall between the inner surface and the outer surface; and

a first molding compound and a second molding compound forming an interface around the glass lid;

wherein the first molding compound and the second molding compound are directly coupled to the sidewall of the glass lid.