US 12,237,339 B2
Display panel
Jing Liu, Shenzhen (CN); Hongzhao Deng, Shenzhen (CN); Zhengbo Cui, Shenzhen (CN); and Hao Chen, Shenzhen (CN)
Assigned to TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD., Shenzhen (CN)
Appl. No. 17/765,218
Filed by HUIZHOU CHINA STAR OPTOELECTRONICS DISPLAY CO., LTD., Guangdong (CN); and TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD., Guangdong (CN)
PCT Filed Mar. 29, 2022, PCT No. PCT/CN2022/083662
§ 371(c)(1), (2) Date Mar. 30, 2022,
PCT Pub. No. WO2023/173481, PCT Pub. Date Sep. 21, 2023.
Claims priority of application No. 202210257276.2 (CN), filed on Mar. 16, 2022.
Prior Publication US 2024/0072066 A1, Feb. 29, 2024
Int. Cl. H01L 27/12 (2006.01); H01L 25/16 (2023.01)
CPC H01L 27/124 (2013.01) [H01L 25/167 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display panel, wherein the display panel comprises:
a grounding signal wiring;
a power line, wherein the power line and the grounding signal wiring are disposed parallelly and are spaced apart, and the power line and the grounding signal wiring extend along a first direction;
a plurality of driving chips, wherein the plurality of driving chips are disposed between the grounding signal wiring and the power line, each of the driving chips comprises a grounding signal pin, a stage-transfer signal input pin, a stage-transfer signal output pin, and a plurality of data selection pins, the grounding signal pin, the stage-transfer signal input pin, and the stage-transfer signal output are spaced apart on a side of the driving chips close to the grounding signal wiring along the first direction, and the plurality of data selection pins are spaced apart on a side of the driving chips close to the power line along the first direction, and the grounding signal pin is connected to the grounding signal wiring;
a driving chip input output signal wiring, wherein the driving chip input output signal wiring is configured to connect the stage-transfer signal input pin and the stage-transfer signal output pin of two adjacent driving chips; and
a plurality of light-emitting lamp groups, wherein the plurality of light-emitting lamp groups are located between the driving chips and the power line, one terminal of each of the light-emitting lamp groups is connected to corresponding data selection pins, and another one terminal of each of the light-emitting lamp groups is connected to the power line; and
wherein the grounding signal wiring, the driving chip input output signal wiring, and the power line are disposed in a same layer and do not intersect with each other.