US 12,237,324 B2
Integrated circuit device
Jangeun Lee, Hwaseong-si (KR); Minjoo Lee, Anyang-si (KR); Eunyoung Lee, Hwaseong-si (KR); and Minsik Kim, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Nov. 4, 2022, as Appl. No. 18/052,726.
Claims priority of application No. 10-2021-0153342 (KR), filed on Nov. 9, 2021.
Prior Publication US 2023/0146530 A1, May 11, 2023
Int. Cl. H10B 12/00 (2023.01); H01L 21/02 (2006.01); H01L 27/06 (2006.01)
CPC H01L 27/0605 (2013.01) [H01L 21/02181 (2013.01); H01L 21/02189 (2013.01); H01L 21/02194 (2013.01); H10B 12/315 (2023.02); H10B 12/482 (2023.02); H10B 12/485 (2023.02)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit device comprising:
a plurality of gate structures embedded in a substrate;
a direct contact on the substrate between the plurality of gate structures; and
a bit line electrode layer on the direct contact,
wherein the bit line electrode layer has a thickness of about 10 nm to 30 nm, and
the bit line electrode layer comprises a molybdenum tungsten (MoW) alloy including molybdenum (Mo) in a range of about 25 at % to about 75 at %.