| CPC H01L 27/0207 (2013.01) [H01L 21/823437 (2013.01); H01L 27/11807 (2013.01)] | 20 Claims |
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1. A filler cell region in a semiconductor device, the filler cell region comprising:
gate segments extending in a first direction and being free from electrical coupling to active or passive circuitry within the filler cell region;
relative to the first direction:
a majority of first ends of the gate segments substantially aligning with a first reference line extending in a second direction perpendicular to the first direction, the first reference line being parallel and proximal to a top boundary of the filler cell region;
a majority of second ends of the gate segments substantially aligning with a second reference line extending in the second direction and being parallel and proximal to a bottom boundary of the filler cell region;
first and second ones of the gate segments extending continuously across the filler cell region; and
third & fourth and fifth & sixth ones of the gate segments being correspondingly coaxial and separated by corresponding gate-gaps located centrally in the filler cell region;
relative to the second direction, the first and second gate segments being between the third & fourth gate segments and the fifth & sixth gate segments; and
relative to the first direction:
a first end of the first gate segment extending to the top boundary; and
a second end of the second gate segment extending to the bottom boundary.
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