US 12,237,316 B2
Display substrate, tiled display panel and display device
Wei Li, Beijing (CN); Can Wang, Beijing (CN); Can Zhang, Beijing (CN); Li Xiao, Beijing (CN); Minghua Xuan, Beijing (CN); Lijun Yuan, Beijing (CN); Jinfei Niu, Beijing (CN); Jingjing Zhang, Beijing (CN); and Guangcai Yuan, Beijing (CN)
Assigned to BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/778,540
Filed by BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Jun. 25, 2021, PCT No. PCT/CN2021/102386
§ 371(c)(1), (2) Date May 20, 2022,
PCT Pub. No. WO2022/267008, PCT Pub. Date Dec. 29, 2022.
Prior Publication US 2023/0069670 A1, Mar. 2, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 25/16 (2023.01)
CPC H01L 25/167 (2013.01) [H01L 24/05 (2013.01); H01L 24/06 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 2224/05573 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/0568 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/33183 (2013.01); H01L 2224/45015 (2013.01); H01L 2224/45124 (2013.01); H01L 2224/45139 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/48095 (2013.01); H01L 2224/48157 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/83005 (2013.01); H01L 2224/85005 (2013.01); H01L 2224/8593 (2013.01); H01L 2924/0132 (2013.01); H01L 2924/12041 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display substrate comprising:
a base substrate comprising at least a side edge and a display area;
a plurality of pixel units disposed in the display area comprising a first pixel unit, a second pixel unit and a third pixel unit, wherein the second pixel unit is located on a side of the first pixel unit close to the side edge, edges of the second pixel unit comprise the side edge, the third pixel unit is located between the first pixel unit and the second pixel unit, and the third pixel unit is adjacent to the second pixel unit; and
a plurality of light emitting diode chips disposed on the base substrate comprising a first light emitting diode chip and a second light emitting diode chip, wherein the first light emitting diode chip is located in the first pixel unit, a part of the second light emitting diode chip is located in the second pixel unit, and the other part of the second light emitting diode chip is located in the third pixel unit.