US 12,237,284 B2
Semiconductor structure comprising dummy feature interposed between the bonding connectors
Chen-Yu Tsai, Taoyuan (TW); Ku-Feng Yang, Hsinchu County (TW); Tsang-Jiuh Wu, Hsinchu (TW); and Wen-Chih Chiou, Miaoli County (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 16, 2022, as Appl. No. 17/672,727.
Prior Publication US 2023/0260940 A1, Aug. 17, 2023
Int. Cl. H01L 23/00 (2006.01)
CPC H01L 24/06 (2013.01) [H01L 24/03 (2013.01); H01L 24/08 (2013.01); H01L 2224/06517 (2013.01); H01L 2224/08145 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
an interconnect structure disposed over a semiconductor substrate;
contact pads disposed on the interconnect structure;
a dielectric structure disposed on the interconnect structure and covering the contact pads;
bonding connectors covered by the dielectric structure and landing on the contact pads, top surfaces of the bonding connectors being substantially coplanar with a top surface of the dielectric structure, and the bonding connectors being electrically coupled to the interconnect structure through the contact pads; and
a dummy feature covered by the dielectric structure and laterally interposed between adjacent two of the bonding connectors, wherein a maximum height of the dummy feature is greater than a maximum height of one of the adjacent two of the bonding connectors.