US 12,237,260 B2
Semiconductor device structure with stacked conductive plugs and method for preparing the same
Yi-Hsien Chou, Taoyuan (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Dec. 3, 2021, as Appl. No. 17/541,587.
Prior Publication US 2023/0178473 A1, Jun. 8, 2023
Int. Cl. H01L 23/522 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/31144 (2013.01); H01L 21/76807 (2013.01); H01L 21/76843 (2013.01); H01L 21/76877 (2013.01); H01L 23/5283 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A semiconductor device structure, comprising:
a first dielectric layer disposed over a semiconductor substrate;
a second dielectric layer disposed over the first dielectric layer;
a first conductive plug disposed in the first dielectric layer, wherein a top surface of the first conductive plug is greater than a bottom surface of the first conductive plug; and
a second conductive plug disposed in the second dielectric layer and directly over the first conductive plug;
wherein the first conductive plug comprises an upper portion and a lower portion, wherein the upper portion of the first conductive plug has lateral extension portions that protrude into the first dielectric layer to form the top surface, and each of the lateral extension portions has a tapered width that is gradually tapered from the second dielectric layer to the semiconductor substrate, and wherein the lower portion of the first conductive plug has an identical width and forms the bottom surface;
wherein the top surface of the first conductive plug includes a center area over which the second conductive plug is deposited and an edge area surrounding the center area and corresponding to the lateral extension portions, and the edge area is exposed to the second dielectric layer and not covered by the second conductive plug.