US 12,237,254 B2
Semiconductor device including wiring substrate having multiple signal wirings and multiple insulating layers
Keita Tsuchiya, Tokyo (JP); Shuuichi Kariyazaki, Tokyo (JP); and Kazuhiro Mitamura, Tokyo (JP)
Assigned to RENESAS ELECTRONICS CORPORATION, Tokyo (JP)
Filed by RENESAS ELECTRONICS CORPORATION, Tokyo (JP)
Filed on Jun. 15, 2022, as Appl. No. 17/841,196.
Claims priority of application No. 2021-140945 (JP), filed on Aug. 31, 2021.
Prior Publication US 2023/0066512 A1, Mar. 2, 2023
Int. Cl. H01L 23/498 (2006.01); H01L 23/14 (2006.01); H01L 23/36 (2006.01); H01L 23/367 (2006.01); H01L 23/66 (2006.01); H01P 3/08 (2006.01)
CPC H01L 23/49822 (2013.01) [H01L 23/14 (2013.01); H01L 23/36 (2013.01); H01L 23/3675 (2013.01); H01L 23/49838 (2013.01); H01L 23/66 (2013.01); H01P 3/08 (2013.01); H01L 2223/6627 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor chip having a first surface on which a first electrode is arranged, the first electrode being a transmission path of a first signal;
a wiring substrate having a second surface facing the first surface of the semiconductor chip; and
a heat radiating plate disposed on the wiring substrate such that the semiconductor chip is covered with the heat radiating plate,
wherein the heat radiating plate has:
a first portion including a portion overlapping with the semiconductor chip; and
a second portion arranged around the first portion and bonded to the wiring substrate via an adhesive layer,
wherein the wiring substrate includes:
a first insulating layer;
a first conductive pattern formed on the first insulating layer and to which a first potential is to be supplied;
a second insulating layer contacted with the first conductive pattern and formed on the first insulating layer such that the first conductive pattern is covered with the second insulating layer;
a first signal wiring formed on the second insulating layer;
a third insulating layer contacted with the first signal wiring and formed on the second insulating layer such that the first signal wiring is covered with the third insulating layer;
a second signal wiring formed on the third insulating layer and electrically connected with each of the first signal wiring and the first electrode; and
an organic insulating film contacted with the second signal wiring and formed on the third insulating layer such that the second signal wiring is covered with the organic insulating film,
wherein the first signal wiring is arranged in a region overlapping with the second portion of the heat radiating plate,
wherein the second signal wiring is not arranged in the region overlapping with the second portion of the heat radiating plate,
wherein the first conductive pattern has a first opening portion located at a position overlapping with the first signal wiring, and
wherein the first opening portion is formed so as to extend along the first signal wiring.