US 12,237,253 B2
Semiconductor package and method for fabricating the same
Jun Hyeong Park, Hwaseong-si (KR); Jin Young Kim, Suwon-si (KR); and Young Kwan Seo, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Feb. 22, 2022, as Appl. No. 17/677,012.
Claims priority of application No. 10-2021-0067354 (KR), filed on May 26, 2021.
Prior Publication US 2022/0384325 A1, Dec. 1, 2022
Int. Cl. H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/49822 (2013.01) [H01L 21/4857 (2013.01); H01L 23/49816 (2013.01); H01L 23/49833 (2013.01); H01L 23/49838 (2013.01); H01L 25/0655 (2013.01); H01L 25/0657 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/16147 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06568 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
an interposer having:
a pad insulating film,
a first lower pad exposed by a lower surface of the pad insulating film, the first lower pad including:
a first extension and a second extension spaced apart from each other, the first extension and the second extension extending side by side in a first direction, and
a first connection extending in a second direction intersecting the first direction, the first connection connecting the first extension and the second extension, and
a redistribution structure that covers an upper surface of the pad insulating film;
first interposer bumps on a lower surface of the interposer, the first interposer bumps being spaced apart from each other, and at least a part of the first extension and at least a part of the second extension being connected to one of the first interposer bumps; and
a first semiconductor chip on an upper surface of the interposer, the first semiconductor chip being electrically connected to the redistribution structure.