| CPC H01L 23/4275 (2013.01) [H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/24 (2013.01); H01L 24/06 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/19 (2013.01); H01L 2224/214 (2013.01); H01L 2224/221 (2013.01); H01L 2224/24137 (2013.01)] | 19 Claims |

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1. A power overlay (POL) module comprising:
a semiconductor device having a body, the body including a first side and an opposing second side, the semiconductor device including a first contact pad defined on the first side;
a conductive plate having a first side and an opposing second side, the conductive plate first side coupled to the semiconductor device second side;
a dielectric layer, having a first side and an opposing second side, defining a set of first apertures therethrough, the dielectric layer second side disposed facing the semiconductor device first side;
a metal interconnect layer, having a first side and an opposing second side, the metal interconnect layer second side disposed on the dielectric layer first side and extending through the set of first apertures to define a set of vias electrically coupled to the first contact pad;
an enclosure having a set of walls cooperatively defining an interior portion, and a set of fins disposed in the interior portion, the enclosure coupled to the metal interconnect layer first side; and
a phase change material (PCM) disposed in the enclosure interior portion in direct contact ith the set of fins, wherein at least one wall of the enclosure is disposed between the PCM and the metal interconnect layer first side.
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