US 12,237,223 B2
Contact over active gate structures using directed self-assembly for advanced integrated circuit structure fabrication
Paul A. Nyhus, Portland, OR (US); Charles H. Wallace, Portland, OR (US); Manish Chandhok, Beaverton, OR (US); Mohit K Haran, Hillsboro, OR (US); Gurpreet Singh, Portland, OR (US); Eungnak Han, Portland, OR (US); Florian Gstrein, Portland, OR (US); Richard E. Schenker, Portland, OR (US); David Shykind, Buxton, OR (US); Jinnie Aloysius, Portland, OR (US); and Sean Pursel, Hillsboro, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 25, 2020, as Appl. No. 17/033,483.
Prior Publication US 2022/0102210 A1, Mar. 31, 2022
Int. Cl. H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 27/088 (2006.01)
CPC H01L 21/76897 (2013.01) [H01L 21/76816 (2013.01); H01L 23/5226 (2013.01); H01L 23/5329 (2013.01); H01L 27/0886 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit structure, comprising:
a plurality of gate structures above substrate, each of the gate structures including a gate insulating layer thereon;
a plurality of conductive trench contact structures alternating with the plurality of gate structures, each of the conductive trench contact structures including a trench insulating layer thereon;
a remnant of a di-block-co-polymer over a portion of the plurality of gate structures;
an interlayer dielectric material over the di-block-co-polymer, over the plurality of gate structures, and over the plurality of conductive trench contact structures;
an opening in the interlayer dielectric material; and
a conductive structure in the opening, the conductive structure in direct contact with a corresponding one of the trench contact structures.