| CPC H01L 21/67288 (2013.01) [G01N 21/9501 (2013.01); H01L 21/67253 (2013.01); H01L 21/6732 (2013.01); H01L 21/67383 (2013.01); H01L 21/67386 (2013.01); H01L 21/6773 (2013.01); H01L 21/6875 (2013.01); H01L 22/12 (2013.01)] | 2 Claims |

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1. A wafer storage device comprising:
one or more mutually aligned rails having a top surface and a bottom surface, the one or more mutually aligned rails extending in alignment from opposing side walls of the wafer storage device,
the opposing side walls separated by a top wall, a bottom wall, and a back wall together enclosing a chamber having a mouth, wherein the one or more mutually aligned rails are spaced and configured, in combination, to support a wafer within the chamber of the wafer storage device,
the top surface of the one or more mutually aligned rails positioned a first distance from the top wall of the wafer storage device, and
the bottom surface of the one or more mutually aligned rails positioned a second distance, greater than the first distance, from the top wall of the wafer storage device; and
a sensor array positioned along one or both rails of each set of mutually aligned rails in a direction substantially parallel to the side wall, wherein at least one sensor of the sensor array is positioned on a bottom surface of the set of mutually aligned rails;
wherein the sensor array is configured to measure at least one physical property of a wafer supported on each respective set of rails and wherein the at least one sensor positioned on the bottom surface of the set of mutually aligned rails is configured to measure at least one physical property of a second wafer supported on a set of rails positioned beneath the respective set of rails.
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