| CPC G11C 7/1048 (2013.01) [G11C 7/1078 (2013.01); G11C 7/1084 (2013.01); G11C 7/1087 (2013.01); G11C 7/1093 (2013.01); G11C 7/222 (2013.01); H03F 3/45183 (2013.01); G11C 7/02 (2013.01)] | 19 Claims |

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1. A data receiving circuit, comprising:
a first amplification circuit, configured to receive a data signal, a first reference signal and a second reference signal, perform first comparison on the data signal and the first reference signal in response to a sampling clock signal and output a first signal pair as a result of the first comparison, and perform second comparison on the data signal and the second reference signal, and output a second signal pair as a result of the second comparison, wherein a level of the first reference signal is different from a level of the second reference signal, the first signal pair comprises a first signal and a second signal, and the second signal pair comprises a third signal and a fourth signal; and
a second amplification circuit, configured to receive an enable signal and a feedback signal, selectively receive the first signal pair or the second signal pair as an input signal pair based on the feedback signal during a period in which the enable signal is at a first level, receive the first signal pair as the input signal pair during a period in which the enable signal is at a second level, amplify a voltage difference of the input signal pair, and output a first output signal and a second output signal as an amplification result, wherein the feedback signal is obtained based on previously received data.
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