asserting a read wordline signal to a desired wordline of a column mux read-only memory, wherein a single bitcell corresponding to the wordline is associated with at least two separate column select signal lines;

asserting a single column select signal to a desired one of the at least two separate column select signal lines to select a particular bitcell from the desired wordline;

forwarding, in response to asserting the column select signal, a bit value stored at that particular bitcell to a gate of a transistor that connects a first stage local bitline to a second stage local bitline; and

forwarding an inversion of the bit value to the second stage local bitline through a drain of the transistor for local bitline sensing.