| CPC G11C 16/102 (2013.01) [G11C 16/08 (2013.01); G11C 16/3459 (2013.01)] | 20 Claims |

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1. A method for operating a memory device, comprising:
applying a multi-plane programming scheme to simultaneously perform programming operations on at least two memory planes of the memory device; and
in response to determining that the at least two memory planes include an exceptional memory plane having a programming failure, switching to a single-plane programming scheme to sequentially perform programming operations on the at least two memory planes, comprising:
applying a first programming voltage on a selected word line on the exceptional memory plane, wherein the first programming voltage is less than a second programming voltage applied to the selected word line of the exception memory plane when it is determined that the exceptional memory plane has the programming failure.
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